In the past, the semiconductor, in particular a CPU package, which was provided at the inside of an electronic apparatus would generate heat during operation and become high in temperature, so a heat sink was attached to prevent an excessive rise in temperature. The heat sinks up to now have been formed from aluminum and other metal materials with a good heat conductivity. Ones comprised of base members, which are placed on the heat generating member, on which large numbers of heat dissipating fins are provided sticking out at predetermined intervals have been the mainstream.
On the other hand, if electronic apparatuses become higher in performance and the amount of heat generated by the semiconductor packages increases, the heat dissipating efficiency of the heat sinks would have to be improved, or else a rise in the temperature of the semiconductor package could no longer be prevented. For this reason, apparatuses have appeared in which a Peltier device which utilizes the Peltier effect is attached at the bottom of the base member of the heat generator and a DC current is run to the Peltier device to control the cooling performance of the heat sink. Furthermore, a heat sink of a type which provides an independent temperature monitor inside of the heat sink for the purpose of detecting the surface temperature of the semiconductor package is disclosed in Japanese Laid-Open Patent Publication No. 2010-232519.
In this regard, in recent years, along with the higher operating frequencies of LSI's (large scale integrated circuits), there have been more severer instantaneous changes in the operating current (load fluctuations). There has therefore been the issue that with conventional heat sinks, temperature control of the semiconductor package has not been possible. This is because conventional heat sinks are high in thermal resistance and narrow in cooling control range, so temperature control of the semiconductor package has not been possible. Further, if temperature control of the semiconductor package is not possible, at the time of a temperature test of a semiconductor package, it would be difficult to suppress self heat generation until the device destruction temperature. Further, if high speed temperature control is not able to be realized, the temperature test conditions (temperature, voltage, etc.) may be eased to run the tests, but there was the issue that it was not possible to eliminate the fault rate in the later steps. The reason why it was not possible to eliminate the fault rate in the later steps is that the temperature test may not be conducted under the “system test conditions”.